1. Field of the Invention
The present invention relates to the field of analog circuits for multiplying and switching signals. More specifically, it relates to analog circuits that utilize complementary device input and gain stages to accomplish the multiplying and switching functions.
2. Description of Related Art
Certain known analog multiplier circuits commonly include input stages and a gain core, for example, as illustrated in FIGS. 1A and 1B. Referring to FIG. 1A, an X-input stage comprises a differential voltage to differential current converter 22 and two diode load transistors 10, 12 connected to the outputs of differential converter 22. The Y-input stage comprises a differential voltage to differential current converter 24 and two pairs of transistors 14, 16 and 18, 20 connected to form differential amplifiers 26, 28, respectively. The common emitters of differential pairs 14, 16 and 18, 20 are connected to the outputs of the Y current converter 24 and the collectors of differential pairs 14, 16 and 18, 20 are cross connected to form the multiplier outputs.
The multiplying action of the circuit of FIG. 1A occurs in differential amplifiers 26, 28, which form the gain core of the multiplier circuit. Current output of X-input converter 22 generates logarithmically related voltages at the emitters of transistors 10, 12. Use of these voltages to drive the gain core differential amplifiers 26, 28 generates a linear translation of the X-input signals due to the anti-log action of the component transistors 14, 16, 18, 20. Application of the output current from the Y input converter 24 to the common emitters of differential pairs 14, 16 and 18, 20 determines the transconductance of differential amplifiers 26, 28. As a result, the product of the X and Y-input signals is generated as the difference between the outputs of the cross connected collectors of the differential pairs 14, 16 and 18, 20. The overall circuit obeys the equation; EQU (I.sub.o+ -I.sub.o-)=(V.sub.x+ -V.sub.x-) (V.sub.y+ -V.sub.y-) K (Eq. 1)
where K is a constant that depends on the gain of the input differential converters and the DC bias current of the diodes and the output differential pairs. A two quadrant version of the multiplier circuit is shown in FIG. 1B.
Both circuits are very fast because all of the devices except those in the input differential voltage to current converters 22, 24 operate in current mode. However, each circuit also has the following limitations.
The output is directed toward the positive supply, V.sub.CC. In addition, the complete product output signal is only obtained by taking the difference between the cross connected collectors of differential pair 14, 16 and 18, 20. To create a ground referenced output requires a differential to single ended conversion together with level shifting, which reduces the bandwidth and increases the complexity of the circuit.
Signal feedthrough from either input to the output with the other input grounded increases with frequency and severely limits the usable dynamic range of prior art multiplier circuits at higher operating frequencies. In addition, the null point will drift with temperature and die stress, affecting the usable dynamic range down to DC.
Further, the DC accuracy and usable dynamic range of the prior art multiplier is critically dependent on the matching and stability of diode connected transistors 10, 12 and gain core transistors 14, 16, 18, 20. These matching and stability problems commonly arise in integrated circuit realizations of the prior art as a result of die stress and diffusion and thermal gradients. In theory, such component mismatch problems can be reduced by cross-quading, whereby twin devices are connected in parallel with each transistor in the circuit. Device pairs are then arrayed to offset the effects of the various gradients. However, the resulting cross connected leads are difficult to make and the parallel connections offer only limited reduction in device mismatch problems.
Finally, the inputs of conventional multiplier circuits commonly operate in voltage mode. Use of voltage input signals limits the bandwidth of the circuit and reduces the dynamic input ranges to less than the total supply voltage.